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Main Source of DM Noise
Now we turn our attention to a real power supply to see for ourselves where all the buzz is really coming from. First consider what would happen if the input bulk capacitor of the power supply had been a "perfect" capacitor: i.e. with zero effective series resistance (ESR) (ignoring all other capacitor parasitics too). Then any possible differential noise source inside the power supply would be completely bypassed by this capacitor. Clearly, the reason this does not happen is the non-zero ESR of the bulk capacitor.
So the ESR of the input capacitor is the major portion of the impedance "Z_dm" seen by the DM noise generator. The input capacitor, besides being refreshed by the operating current flowing in through the supply lines, also tries to provide the high frequency pulses of current demanded by the switcher. But whenever current passes through any resistance, such as the ESR in this case, there must be a corresponding voltage drop. So we will see a high frequency voltage ripple across the terminals of the input capacitor. See Ill. 1.
This high-frequency voltage ripple shown in Ill. 1 is in effect the DM noise generator.
It is essentially a voltage source (VESR_hf), but producing noise in the form of a noise current I_dm.
Ill. 1: How DM noise is created
However, we should take a closer look at Ill. 1. The input line current flows through the diodes only for a brief moment during the AC cycle. That's when the diodes are forward biased. But during the time the diodes are OFF (highlighted in gray on each waveform), the high frequency switching current still continues to flow through the mosfet. This drives V_ESR negative. So the high-frequency ripple continues to be seen on the HVDC rail (marked "V_IN"). But surprisingly, noise still appears on the line side of the supposedly reverse biased diodes too. That indicates that the DM noise generator tends to behave as a current source when the diodes are OFF (dragging in noise through the reverse-biased diodes). We can look at this from another perspective. The bulk capacitor, because of its non-zero ESR is incapable of providing all the entire high frequency content of the switching current. But the inductor, being essentially a current source, is literally not going to take "no" for an answer. The current must come from somewhere, even if it means dragging the voltage on the anode the bridge rectifier diode momentarily low so as to extract current from that route.
Therefore, the DM noise generator is modeled as a voltage source during the times when the diodes are ON, but as a current source during the times when the diodes are all OFF.
The two models flip-flop back and forth at twice the line frequency. This could make it very hard to analyze. However, it has been seen that if a small X-cap is placed immediately to the left of the input bridge, then we can safely assume that the EMI spectrum is dominated by the voltage source, and can thus ignore the current source model. See "C1" in Ill. 1.
Also note that in Ill. 1 we have shown I_dm as going into L and out of N. In the opposite half of the ac cycle, these directions will reverse, along with the ac line current direction. So the DM current direction "sloshes back and forth" depending on which part of the ac cycle we are on. Of course, from the point of view of the final EMI scan, this makes no difference, as several ac cycles will be looked at by the analyzer for each measurement.
The Main Source of CM Noise
By definition, if there is CM noise, there must be some leakage path to Earth. But in power supplies this path is quite unlike what engineers in other fields may be talking about. For example, in many power supplies, we often use the enclosure to provide us with a fortuitous "infinite heatsink" with which to cool our power devices. We need some electrical insulation, since the tab of the power device is usually the drain of the mosfet, and that point is usually swinging. An insulator for such a purpose needs to be a poor electrical conductor, but a good thermal conductor - so we can cool the device, while still meeting safety requirements. But we also know that whenever we have two metal plates with an interposing dielectric (the insulator), we create a capacitance. From Maxwell's laws we know that if we vary the voltage across these plates, we create a magnetic field, and that is attributable to a current that starts flowing through this parasitic capacitor. In our case, this corresponds to noise current flowing into the earth -- in other words "common mode noise." The applicable equation is:
I = C (dV / dt)
Usually, we don't have much control over the dV/dt, and nor do we really want to reduce it too much in the interest of efficiency. So to reduce this current, we need to reduce C. But a closer look at the root equations reveals a dilemma. The thermal resistance (R_th - in deg. C/W) is given by
R_th = 1 / rho x d / A
where A is the cross-sectional area of the insulator in m^2 (i.e. the interface area between the device and the heatsink), d is the thickness of the insulator in m, and ? is the thermal conductivity of the insulating material (in W/m- dgr. C). However, the capacitance "C" (in F) is given by
C = K × eO × (A/d)
where K is the dielectric constant of the insulator, and eO is the permittivity of free space (8.854 × 10^-12 F/m). Note that K is dimensionless, being the ratio of the permittivity of the insulating material to the permittivity of air (free space), that is, K = e/eO. It is also called the relative permittivity, er .
Therefore, combining the above two equations, we get R_th as a function of C:
R_th = (K × eO) / (C × rho)
We can conclude that:
+ The relationship between R_th and C does not depend on A or d - since only the characteristics of the material remain in the equation above.
+ So, if we try to improve (decrease) R_th, the capacitance will definitely increase. And that would clearly increase the CM noise current.
+ Because of the inverse proportionality, we can conclude that if we manage to halve the parasitic capacitance, that will give us roughlya6dB improvement in EMI- because CM emissions (in dB) would vary according to 20 × log(Ratio of C), and we know that 20 × log(2) ˜ 6 dB. However, we can see from the curve that is also accompanied by a doubling of the thermal resistance of the interface. So if, for example, we previously had a 10°C difference from case to heatsink, we would now have 20°C. And we also know that every 10°C rise of temperature doubles the failure rate of the component (rule-of-thumb). So, we have to weigh the consequences of trying to reduce EMI in this manner against reliability.
Typical values of parasitic capacitance that can be created in a power supply by the insulator are presented in table 1. Here we are comparing a traditional insulator material, mica, with a modern choice, silicone rubber.
Note: Mica is a naturally mined mineral (mainly from India). Besides being cheap, it is a very good thermal conductor, and a very poor electrical conductor. Therefore, it was the insulator of choice for many years for mounting power semiconductors on heatsinks. It is still very popular in extra high-voltage applications. However, in power supplies, it fell from favor mainly because of certain production issues - particularly those revolving around the thermal grease that was always required along with it. Besides being messy to apply and hard to control, thermal grease can evaporate slowly (at high temperatures), and this causes a worsening of the thermal resistance over time. Modern materials like silicone rubber have an ability to conform to fairly imperfectly ?at surfaces. They therefore require no grease. In fact, the thermal resistance actually falls with time for these insulators.
Tbl. 1: Typical mounting capacitances
Package: TO-3 | TO-220 | TO-3P | TO-247F
Capacitance (pF): 111 | 155 36 51 72 101 62 87
From Tbl. 1 we can see that mica creates higher parasitic capacitances despite a lower K, and that is clearly attributable to the smaller thickness of insulator typically required. The same happens when we use some of the modern, expensive, and yet popular polyimide (not "polyamide"!) insulators which are excellent thermal conductors, but are also very thin. These can be recognized by their typically amber color, and they come in various brand names like Kapton, Kinel, Upilex, Upimol, Vespel, and so on.
So the question is: should we just put in another layer of insulator to solve our EMI problem? In other words, what thickness of insulator do we really need? The criterion to select a given thickness of insulator is normally based on maximizing thermal performance (as thin as possible) while still complying with any applicable safety requirements, like the required voltage withstand capability. European safety norms require that basic or supplementary insulation be rated at least 1500 V-ac, whereas double or reinforced insulation must be rated over 3000 V-ac. So, for example, a mica sheet of 0.06 mm thickness is typically rated 1000 V-ac, whereas 0.1 mm thick mica is typically rated 1500 V-ac (or 2000 V-ac). Therefore 0.06 mm thick mica usually cannot be used except as functional isolation. It can be used in low voltage dc-dc converters, or even in off-line applications where the heatsink is not connected to the chassis/earth. If the line voltage is always less than 130 V-ac (as for equipment intended for use only in the United States), the mandatory dielectric withstand requirement for basic insulation is only 1000 V-ac. Therefore, 0.06 mm mica can be used as basic insulation (with earthing providing the second level of protection). For general acceptability all across Europe, we may always need to place reinforced insulation (rated 3000 V-ac) from primary side to earth -- irrespective of earthing (since lack of earthing doesn't count as a fault condition in many regions). In our case, that means two layers of 0.1 mm mica are always required when mounting primary side power devices on to the chassis.
Note: It must be pointed out that some high-end power supply designs (e.g. military grade) use ceramic insulators (e.g. beryllium oxide or aluminum oxide, the latter also called alumina). These offer very high thermal conductivities - about 30-50 times better than mica (which has ? = 0.7 W/m-deg. C) and can therefore be much thicker, so as to reduce the capacitance (they need to be thicker too, because they are brittle). We note that beryllium oxide has toxic properties and is therefore not suited for a typical commercial production environment. But use of these ceramic materials can significantly reduce the capacitive noise. There is also an interesting rule called the "45° rule" (degrees of angle not temperature) which has been used successfully by designers of such high-end converters. This rule indicates that you actually decrease the thermal resistance by using larger thicknesses of insulator, basically because more and more of the cross-sectional area of the insulator gets utilized as thickness increases. Note however that like mica, thermal grease is required with these materials too, because of their inherently poor surface finish.
Note: If we want to know how much thermal resistance is typically attributable, to thermal grease, we must remember that without this grease we would have air in the spaces between the device and heatsink, and that is a very poor thermal conductor. Thermal grease lowers this interface resistance significantly by filling the spaces, but it does not establish zero thermal resistance either. We can usually model thermal grease as leaving behind about 0.2°C/W of resistance for each square inch of area of contact. The thickness of the layer of grease is not significant, only its area of contact. Knowing the total thermal resistance accurately should help in making a better choice of the insulator and trading some thermal resistance off if necessary for lowering the capacitive coupling.
Now we need to understand the physics behind common mode noise generation. We will also see why the explanations usually given do not really apply to power supplies. Let us first list two main reasons why this divergence should come as no surprise:
1. In power supplies the main leakage path to earth is not resistive, but capacitive.
We also know that in steady state the average current through a capacitor must be zero. So there is no way that a constant leakage current can keep flowing into the earth. It must be going back and forth so as to keep the average voltage across the parasitic capacitance a constant.
2. In fact, the parasitic capacitance is not connected symmetrically to the two input (rectified) dc rails. So why should the ground leakage current end up being shared equally by the two lines? Now let us look at Ill. 2 to see the path the common mode current must actually be taking. Note that we are ignoring the common mode currents that are injected to the secondary side (earthed) through the primary-to-secondary parasitic capacitance present inside the transformer.
Ill. 2: How CM Noise Is Created
We first observe the main path the CM noise current I_cm takes (bold arrows) for this particular half of the ac cycle. Note that both schematics (top and bottom) refer to the same ac half-cycle - the top indicates the possible path of current whenever the switch is turning OFF, and the lower schematic, the path when the switch is turning ON. Two diodes are therefore shown as "reverse-biased" all the time, and assuming the diodes are "perfect," only the diodes shown in black tone in the schematics can conduct (even for CM noise). Note that there are also some stray CM paths indicated (dotted arrows), through which a certain amount of noise may be flowing. However, for now let us ignore these extra paths - in particular the component marked "Y-CAP" on the schematic. We can then make the following observations:
+ The upper half of Ill. 2 shows what happens at the moment the mosfet is turning OFF. The voltage on the drain suddenly goes high. We know that if the voltage across any capacitor changes suddenly, a current is injected through the capacitor, as given by I = C dV/dt. This injected current passes into the chassis/earth, and in the process the capacitor acquires a small amount of charge.
+ The lower schematic shows what happens at the moment the mosfet turns ON. The drain of the mosfet now goes low. So the parasitic capacitance has to give up all the charge it acquired in the previous step (in steady state). The mosfet therefore turns ON and discharges this parasitic capacitance completely, as indicated.
+ We note that when the switch was turning OFF, current was being pulled in through the L wire. And when it turns OFF, the current is pushed out of the N wire. But the latter is equivalent to a current of opposite sign flowing into the N terminal. So eventually, we get the "spiky" CM current shown in the blurb to the right of these schematics. Note that this CM noise is not "dc" as is often suggested in literature.
+ We have a non-symmetrical CM current flow. That is, we don't have identical currents at any given instant in the L and N lines. Further, when the next ac half-cycle comes, the line current and the noise current pattern will get transposed between the L and N lines. (Calling it CM noise is in that sense really a misnomer - just one of the ways in which various terms seem to have gotten misapplied in this area).
+ Whenever we command the mosfet in any power converter to turn OFF, the inductor does not allow the current in the mosfet to change - until a freewheeling path is available. The freewheeling path is provided by the catch diode (not shown in Ill. 2). But for this diode to become "available" (conduct) it must get forward-biased. Which means that the voltage across the mosfet has to rise fully, before the current through it even starts to diminish. But for the mosfet voltage to rise up, all the parasitic and non-parasitic capacitances preventing it from doing so must get charged up too. We know that, for example, one of these capacitors is the drain-to-source capacitance (the COSS of the mosfet). Another such capacitor that we can now identify is the parasitic mounting capacitance to earth. Therefore, in its case too, the inductor current is responsible for pushing current through it (thereby charging it up as required). In other words, the parasitic capacitance "brings the whole weight of the inductor to bear" on the situation. And that is the reason why in a switching power supply, the so-called "CM noise generator" is said to behave as a current source.
+ Now, the drain-to-source capacitance has to get charged up for the diode to start freewheeling, because the other end of this capacitance is firmly connected to a fixed voltage rail (the primary side ground). However, in principle, the parasitic capacitance to earth need not get charged up at all (for freewheeling to be realized).
In fact, we can "enforce" zero current flow through this parasitic capacitance by simply breaking the galvanic connection (continuity) to the earth wire (that is coming in from the mains - assuming no filter stage is present so far). And as expected, this then has no effect on the actual switching process. But what we have done in the process is allowed the enclosure (the other side of this capacitor) to "float." Let us see how that happened. The leakage current through the parasitic capacitor is related to the dV/dt across the parasitic capacitor by the equation I = C dV/dt. So if this parasitic charging current is made zero (by breaking its path), the dV/dt must be zero too. However, on one side of this capacitor, we have a fixed dV/dt (with respect to ground) - created by the switching of the mosfet. So the only way the dV/dt across this parasitic capacitor can be zero is if both plates of the capacitor have the same dV/dt, that is, no net change in the voltage across the capacitor. What all this simply means is that if we don't have a galvanic connection to the earth wire, the enclosure will eventually develop a dV/dt exactly equal to that present on the drain of the mosfet, and it will therefore start radiating. So we may have succeeded in improving the conducted emissions spectrum (by virtually disallowing CM noise from entering the mains wiring), but we are surely stuck with a radiation problem now.
+ Therefore what we really want to do is to provide a path for the CM current to flow. By doing this, we can prevent the dV/dt from developing on the chassis.
For minimizing noise in general, we must actually ensure that all the grounding (earthing) connections - from the PCB to the enclosure, and on to the earth wire, are good. Any intervening PCB traces should also be wide, and of low inductance.
+ But having now allowed the I_cm to flow, how do we control (or limit) it!? First, we need to prevent it from creating strong electromagnetic fields. So our main goal should be to minimize the loop area of the CM current path, so as to prevent it from becoming an effective H-field antenna. We also need to divert this current away from the mains wiring (by providing an alternate path - and thereby returning the current to its source). We thus realize the important role played by the two additional Y-caps marked 'Y-CAP' in Ill. 2 (connected between the rectified dc input rails and earth). One or the other, or both of these capacitors, are commonly seen in commercial power supplies, and they always help in providing several valuable decibels of additional EMI suppression. They must be placed very close to the mosfet - and with low inductance connections (via standoffs in the enclosure for example).
+ Since these additional Y-caps hardly pass any ac line frequency leakage current into the earth (being on the rectified side of the bridge), they are not subject to the previously described safety considerations regarding ground leakage currents.
Therefore we can make them quite large in capacitance. However, as per safety regulations, we still can't ignore what their voltage rating needs to be. So in this position, we usually need two Y2 caps in series (or a single Y1 cap).
+ We can see that the CM noise in power supplies tends to be "non-symmetric." However, the X-cap and Y-caps just before the diode bridge (i.e. toward the incoming supply lines) help in distributing this noise almost equally between the L and N lines.
And that is important if we want the common mode filter that follows to work as envisaged. Otherwise, we will find that it isn't working as well as we expected. And if we didn't know better, we could be needlessly trying to increase the size of the CM choke (but we may need to try increasing the DM choke!).
+ Even seasoned engineers are often extremely nervous about chassis-mounting of power devices. Often they can be coaxed into mounting the output diodes in this manner, but not the high-voltage mosfet. But actually, if the Y-caps shown in Ill. 2 (marked "Y-CAP") are provided for, and they return the injected noise back very close to the mosfet, there is really no problem. To help this process, a metal standoff from the enclosure to the PCB should be positioned very close to where the mosfet is mounted, and a Y-cap from the drain can then be connected right there (see Ill. 3).
Ill. 3: How to MountPower Devices on the Enclosure
+ Effective CM noise suppression usually requires a very "good" connection to earth.
So the earth traces should be very thick and preferably straight - along the length of the PCB - with several metal standoffs if possible, to establish good high-frequency connection from the PCB to the chassis. If this is not done, and supposing the connection is made only toward the ac inlet, and also with wire that is not of very low inductance, the enclosure can start radiating as indicated in Ill. 4. We can visualize that board-mounted IEC inlets will work much better because of the more direct connection they can provide to help return the CM noise back to its source.
+ The entire loop of the PCB traces (up to the input side) as shown in Ill. 4 needs to be thick and short. Unfortunately, this often tends to be necessarily long, considering board layout constraints, and all the other components that need to be mounted on it. So in that case we can provide a high frequency decoupling capacitor from the HVDC to primary ground, very close to the mosfet.
Note: Copper traces can't provide a very low inductance if they are long, however wide they may be. We must remember that though halving the length of any trace does roughly halve its inductance, we have to increase the width of a trace by a factor of 8 to 10 to halve its inductance (see Section 6).
+ Some engineers try to get the "best of both worlds," by mounting the device on the enclosure, but with special insulators - which come with a built-in 'Faraday shield.' This is actually just a thin metal layer sandwiched between layers of insulator. It is supposed to be connected on the PCB to primary ground, and thereby it 'collects' the injected noise and returns it, without letting it pass into the enclosure. However because of safety requirements, such composite insulators are usually very thick, and their thermal resistance is usually unacceptably high - defeating the very purpose of chassis-mounting.
+ A "ground choke" should be avoided at all costs. Think of what it can do if we put this in Ill. 4, say on the wire connecting the PCB to the power inlet.
See the following discussion.
Ill. 4: Preventing the Enclosure from Radiating
The Ground Choke
We ask -- is it really a good idea to place a small inductor (e.g. a bead or small toroid with a few turns) somewhere in the earth connection? Suppose we place it on the wire connecting the ac inlet to the enclosure (or PCB to inlet). This is then called a 'ground choke' or 'earth choke.' It is commonly found on low-power evaluation boards (from vendors promoting their "clever" IC solutions), but rarely seen on a commercial power supply.
We first note that the idea of such a choke seems to be at odds with our previous suggestion of a good high frequency connection to earth. When we place the ground choke, we are basically trying to prevent conducted CM noise from flowing into the mains wiring. But in return, we may have a radiation problem. In addition to that, there are industry-documented cases where the ground choke has caused severe system problems. For example if a power supply is turned on at the peak of the input ac waveform, it produces a very high initial surge of charging current through the Y-caps. If there is a ground choke present, it causes the voltage on the earth traces and the enclosure to locally "bump up." Now in most cases, the return of the output rails of the power supply is also connected directly to the enclosure, and forms the ground plane for the entire system. The system would also typically connect to the chassis/enclosure at several points downstream. So this surge-induced bump, around the power supply, causes severe imbalances across the system ground plane - leading to data upsets and even destruction of the subsystems. A similar situation will arise during ESD testing and conducted immunity testing, in which surge voltages are applied from line to line, or from line to earth. So however tempting it may seem to the power supply designer (who is focused only on solving his or her conducted mode EMI problem, and going home!), a ground choke should be avoided at all costs. Some high-voltage semiconductor companies, who are only making open-frame (enclosure-less/standalone) evaluation boards, seem to have nothing to lose, and everything to gain, by putting in a ground choke. They know that being open-frame anyway, no one expects them to comply with any radiation limits. So they quietly push the problem they may have been seeing in their conducted emissions plot - toward a future radiation emissions saga for the systems designer. Beware!
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